The present disclosure relates to the field of display technology, and in particular to a thin-film transistor (TFT) and a method for fabricating the same, an array substrate and a method for fabricating the same, and a display device.
Thin-film transistors (TFTs) have been arranged on substrates of electronics products, such as a flat display, a thin-film solar cell and so forth. The TFTs are key elements for any liquid crystal display devices, which play a vital role for performance of these display devices.
As display technology improves, display panels that have a super narrow bezel, or even no bezel, and a super high aperture ratio will prevail in the market, which needs a smaller size of the TFTs. As shown in FIG. 1, according to a conventional technology, a-Si TFT may include a gate electrode 11, a gate insulation layer 12, an active layer 13, a source electrode 14 and a drain electrode 15 arranged sequentially on a base substrate 10. Here, the active layer 13 may include an un-doped a-Si layer 131 and doped a-Si layers 132, 133. The source electrode 14 is in contact with the doped a-Si layer 132, while the drain electrode 15 is in contact with the doped a-Si layer 133, so as to reduce resistance. A method for fabricating the TFT as shown in FIG. 1 usually adopts patterning processes, which may include exposure process and the like. Provided that a size of the TFT needs to be reduced, a ratio between width and length (W/L) of the TFT has to be increased. However, since a length of the TFT can hardly be further reduced due to exposure process according to the conventional technology, it is almost impossible to further reduce the size of the TFT.